440 lines
20 KiB
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440 lines
20 KiB
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\begin{document}
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\title{DSP Assignment 2\\Digital Audio Effects Implementation}
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\subtitle{\LARGE{Technical Report}}
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\author{Sam Perry\\U1265119}
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\date{}
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\begin{abstract}
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This report outlines the implementation, testing and evaluation of
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three real-time audio effects using the dsPIC 30F4013 digital signal
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processor. Design choices, system specification, and final results
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are analysed.\\
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System specification is compared with alternative chips to understand
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the quality of the processor in relation to the state of DSP
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technology.\\
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Design choices are compared to choices made in previous work to outline
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the changes required to implement such effects outside unlimited
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resource systems.\\
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Final system performance is then discussed to determine further
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changes that could be made to improve performance.
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\end{abstract}
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\maketitle
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\section{Background/Literature:\\Digital Signal Processor/Microcontroller
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Overview}
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A digital signal processor (DSP) is a form of specialized microprocessor
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designed specifically for the processing of signals (such as audio signals
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in this case).~\parencite[p.11-12]{libtak2006ieh}. The DSP is used as part
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of a microcontroller that provides an interface for components such as
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Memory, data IO and peripherals that form the signal processing system.
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When considering the quality of a DSP system, there are many component
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specifications to consider, that contribute to the overall performance of
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the system. These include:
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\begin{itemize}
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\item CPU
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\item Memory
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\item System bus
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\item Bit depth
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\item Samplerate
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\item D/A \& A/D converters
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\end{itemize}
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In order to understand the specification of the
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dsPIC~\parencite{mt2004dspic} in relation to the standard of DSPs
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available, it will be compared to three other digital signal processors:
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\begin{itemize}
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\item Texas Instruments TMS320F2806~\parencite{ti2016pm}
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\item Freescale 56F8025~\parencite{fs2006dsc}
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\item Analog Devices ADSP-2126~\parencite{ad2012adsp}
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\end{itemize}
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\subsection{General Computing Factors}
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Factors such as memory and CPU speed affect all computing systems. These
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address the system's ability to perform calculations and handle data.
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\subsubsection{Memory}
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There are two types of memory that constitute the total memory of a
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microcontroller: program memory and data memory.
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\paragraph{Program Memory}~\\
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Most modern microcontrollers use flash memory for the storage of code
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executed at runtime. This is known as ROM (read-only memory) and may be
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reffered to as the ``program memory''. The size of this memory determines
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the amount of code that can be stored at any one time in the system.
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This has implications with regards to the complexity of the program, as
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insufficient program memory will limit the number of instructions that can
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be used for programming.~\parencite[p.317]{raf2014fdlm}
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\begin{table}[H]
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\centering
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\caption{DSP maximum available ROM memory}
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\label{my-label}
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\begin{tabular}{ll}
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\textbf{Model} & \textbf{Program Memory}\\
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dsPIC30F4013/PIC24 & 48kb \\
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TMS320F2806 & 256kb \\
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56F8025 & 32kb \\
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ADSP-2126 & up to 4mb
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\end{tabular}
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\end{table}
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These specifications indicate that the memory of the hardware used is
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relatively small compared to other devices available. This limits the
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complexity of programs that can be stored on the device. This accounts for
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the limited complexity of designs described in section \ref{design}.
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Clearly the ADSP has much more memory and has been designed for highly
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complex applications, however the TMS32F2806 series would also have
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sufficient memory for the programs designed in this task.
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\paragraph{Data Memory}~\\
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RAM (random-access memory) is volatile memory that is used for storing data
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used when executing instructions. Unlike ROM memory, RAM can be both read
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from and written to at runtime and is used for the storage of data that can
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change as instructions are executed. This is used for the storage of data
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such as audio buffers and parameter
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variables.~\parencite[p.317]{raf2014fdlm} The amount of RAM available
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determines the maximum size of data such as buffers for audio delays. The
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speed of the RAM is also integral to the overall performance of the system,
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as sufficient speed is required to read and write buffers as instructions
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are executed by the CPU (see section \ref{CPU})
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\begin{table}[H]
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\centering
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\caption{DSP maximum available RAM memory}
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\label{my-label}
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\begin{tabular}{ll}
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\textbf{Model} & \textbf{RAM Size}\\
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dsPIC30F4013/PIC24 & 2kb \\
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TMS320F2806 & 100kb \\
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56F8025 & 4kb \\
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ADSP-2126 & up to 2mb
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\end{tabular}
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\end{table}
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With the lowest memory of any processor in this comparisson, it is clear
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that the dsPIC is lacking in this area. This creates severe limitations in
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buffers and in the case of this project, resulted in severe delay line
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limitations. Again, the TMS32F2806 series would have a far more acceptable
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performance, allowing for multiple delays in a range of seconds as opposed
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to the small fractions of a second possible with the dsPIC.
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\subsubsection{System Bus}
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The system bus handles data IO between components such as the CPU
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and memory. For performance comparisson, the system bus's data width is
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used to determine the maximum amount of memory that the CPU is able to
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write to directly.~\parencite[p.318]{raf2014fdlm}
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For example a 16BIT system can support a maximum of $2^{16}$ memory
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addresses. This equals a maximum memory size of 64Kb of memory directly
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accessible by the CPU. However, a 32BIT system can support $2^{32}$ memory
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addresses which results in
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{\raise.17ex\hbox{$\scriptstyle\mathtt{\sim}$}}4GB of potential
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memory.~\parencite[p.34]{sd2006mfes}\\
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(When analysing specifications of DSP systems it is important not to
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confuse the processing architechuture with the bit depth of the DSP
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components as they affect different aspects of the system.)
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\begin{table}[H]
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\centering
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\caption{DSP bus architecture}
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\label{my-label}
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\begin{tabular}{ll}
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\textbf{Model} & \textbf{Architecture Type}\\
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dsPIC30F4013/PIC24 & 16BIT \\
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TMS320F2806 & 32BIT \\
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56F8025 & 16BIT \\
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ADSP-2126 & 32/40BIT
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\end{tabular}
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\end{table}
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The bus architecture is largely dictated by the total amount of memory
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available to the system and this is reflected in the specification shown in
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the table above. A 16BIT architecture is expected, given the 2kb of memory
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supported by the dsPIC and is marginally faster than higher bit
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architectures as there are less memory locations to allocate.
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\subsubsection{CPU}\label{CPU}
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The CPU (Central Processing Unit) is the component that executes
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instructions and performs calculations on data. The speed at which the CPU
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can execute instructions and store results is critical to the performance
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of the system.
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\paragraph{Clock Speed}~\\
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Measured in cycles per second (Hz), the clock speed defines the number of
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calculations that can be performed per second. A higher clock speed
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indicates a higher number of calculations performed per second. This is
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particularly significant in realtime DSP application as a sufficient number
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of calculations must be performed in a set period of time in order to
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process audio as quickly as it is provided to the system. If the clock
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speed is not sufficient, this may result in instructions being missed due
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to an interrupt before the processor has been able to complete them. This
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can create artefacts in output audio.~\parencite[p.34]{sd2006mfes}\\
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It should be noted that this is not an entirely accurate measurement for
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speed as different manufacturers have different definitions of a
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``calculation''.~\parencite[p.3-4]{bdti2000cdp} For a more accurate
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representation, an impartial benchmark from BDTI has been included where
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possible.~\parencite[p.1]{bdti2013pg}
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\begin{table}[H]
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\centering
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\caption{DSP CPU clock speed}
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\label{my-label}
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\begin{tabular}{lll}
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\textbf{Model} & \textbf{CPU Clock Speed}
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&\textbf{BDTI(sim)mark2000\textsuperscript{TM}}\\
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dsPIC30F4013/PIC24 & 70MHz & 190\\
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TMS320F2806 & 90MHz & n/a\\
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56F8025 & 80MHz & 110\\
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ADSP-2126 & 200MHz & 1090\\
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\end{tabular}
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\end{table}
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From this, it can be seen that the dsPIC and 56F8025 perform significantly
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worse than the ADSP. This has a negative impact on samplerate as it must be
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lowered to account for the lack of processing power. A sample rate of 8Khz
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was used as opposed to the 44.1Khz samplerate that would be feasable on the
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ADSP processor.
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\paragraph{Architecture}~\\
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The CPU architecture refers to the design of memory units and bus layouts.
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The most common designs are von Neumann and Harvard architectures. The von
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Neumann architecture combines program and memory data, allowing only serial
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access of memory. By seperrating program and data memory, the Harvard
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architecture allows for simulataneous access of data and program memory,
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making it the more efficient of the two designs.~\parencite[p.320-321]{raf2014fdlm}
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\begin{figure}[H]
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\caption{von Neumann CPU architecture~\parencite[p.320]{raf2014fdlm}}
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\makebox[\textwidth]{\includegraphics[width=0.75\textwidth]{neumann}}
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\end{figure}
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\begin{figure}[H]
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\caption{Harvard CPU architecture~\parencite[p.321]{raf2014fdlm}}
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\makebox[\textwidth]{\includegraphics[width=0.75\textwidth]{harvard}}
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\end{figure}
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\begin{table}[H]
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\centering
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\caption{DSP bus architecture}
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\label{my-label}
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\begin{tabular}{ll}
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\textbf{Model} & \textbf{Architecture Type}\\
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dsPIC30F4013/PIC24 & Modified Harvard\\
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TMS320F2806 & Harvard\\
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56F8025 & Dual Harvard\\
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ADSP-2126 & Super Harvard
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\end{tabular}
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\end{table}
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Most modern DSPs use variations on the Harvard architecture for it's
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performance. Variations of this have been used in all examples.
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\section{DSP Specific Factors}
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DSP specific factors relate to components specifically affecting the system's
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ability to handle audio signals. These will determine the quality of audio
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manipulation and affect the computational requirements for the system. This
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section briefly covers the computational impact of the DSP specific
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factors.
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\subsection{A/D \& D/A Converters}
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A/D and D/A converters are required for audio input and output. Depending
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on the microcontroller used, these may be integrated in the main circuit
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board or available as peripherals that can be attached via ports (as is the
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case for the PIC24 board used). The quality and accuracy of these
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converters will clearly have an effect on the audio output and using
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converters that can perform as transparently as possible is essential for a
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high quality system.~\parencite[p.147-152]{kadis2012sosr}
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\subsubsection{Samplerate}
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The samplerate defines the frequency at which a measurement will be taken
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from the input audio. This is significant due to the quantity of
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information returned from the A/D converter for processing. Higher sample
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rates generate more measurements per second and thus require more values
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to be computed per second as discussed in section \ref{CPU}
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\begin{figure}[H]
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\caption{Illustration of sine wave sampling~\parencite[p.140]{kadis2012sosr}}
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\makebox[\textwidth]{\includegraphics[width=\textwidth]{quantization}}
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\end{figure}
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\begin{figure}[H]
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\caption{Illustration of quantization error resulting from a low sample
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rate.~\parencite[p.146]{kadis2012sosr}}
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\makebox[\textwidth]{\includegraphics[width=\textwidth]{sampling_error}}
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\end{figure}
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\subsubsection{Bit Depth}
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The audio bit depth determines the accuracy to which amplitudes can be
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differentiated. Higher bit depths result in a higher dynamic range in the
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signal. This has implications for the converters as higher bit rates
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require higher accuracy in generating values for each sample.~\parencite[p.143-145]{kadis2012sosr}
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\section{Design/Analysis}\label{design}
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Effect implementation was largely dicatated by the limitations of the
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dsPIC. As the device had severe memory and processing limitations, it was
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not possible to create effects to the standard of the first assignment. As
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a result, effects were created to emulate the perceptual effect of an echo,
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reverb and chorus under these limitations.
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\subsection{Echo}
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The echo was implemented using a single tap FIR filter. This was intended
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to maximise available memory for the delay time. Through stripping out all
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unnessesary features, a maximum delay size of 700 samples was acheived with
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the addition of two UI switches that could be used for increasing and
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decreasing delay size at runtime. At a samplerate of 8Khz, this allowed
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for a single delay of \textgreater50ms (93.750ms) defined as the minimum
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for the definition of an echo
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by Z{\"o}lzer~\citeyearpar[p.]{zolzer2011dafx}
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\begin{figure}[H]
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\caption{Echo example}
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\makebox[\textwidth]{\includegraphics[width=0.4\textwidth]{echo_measure}}
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\end{figure}
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\subsection{Chorus}
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Three delays of variable size were used to emulate the multi-instrument
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effect created by a chorus. This created three phase shifted versions of
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the original signal which created the perception of multiple instruments.
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The delay time modulation was not possible due to the computational power
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required to implement a modulated delay line on a sample by sample basis.
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\subsection{Reverb}
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The reverb implementation involved a combination of an FIR and IIR filter,
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as defined by Z{\"o}lzer~\citeyearpar{zolzer2011dafx}. This performed
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poorly when compared to the moorer reverb structure used in assignment 1,
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however the complexity of such a structure would require superior
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performance in almost all aspects of the system.
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The design used created a delayed echo that could act as a crude reverb.
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\subsection{User Interface}
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The UI was designed using eight switches and the LCD to create a
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navigatable menu that can be used for the selection of effect, effect
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parameters and volume control. The effect parameter menu is able to update
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it's items dynamically based on the active effects. The desired effect can
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then be selected by cycling through, using repeated presses of the effects
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menu button. Parameter variables can then be increased and decreased for
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the selected effect using two switches.\\
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It was not possible to use the UI in conjunction with any actual audio
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effect as the UI would need to be processed after any audio effects. in
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practice this caused problems as the program did not always have time to
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complete UI logic before the interupt, causing graphical errors and
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unexpected results. As a result, the project presented is a prototype to
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demonstrate possibilities given a capable system.
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\section{Results}
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Overall, the results produced were not of a high standard. The low signal
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to noise ratio, low sample rate and over-simplification of designs made it
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impossible to create results usable in a professional context. With a
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sample rate of 8Khz, a cutoff sampling frequency of 4000khz was created.
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This resulted in a telephony frequency response that removed higher
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frequencies due to the low nyquist rate. Poor converters added significant
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noise to the output which further degraded results. However, steps were
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taken to create the best quality outcome with the resources available.
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\subsection{Echo}
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A maximum single tap delay of 750 samples was achieved through the
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stripping of all unnecessary components. Without a visual UI,
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this was controlled through the use of two switches that
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incremented/decremented the delay in values of 10 samples every 100ms.
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The lack of a feedback loop resulted in a very simplistic delay with
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equally simplistic results in terms of perception. A feedback was not
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implemented to differentiate this from the reverb design.
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\subsection{Chorus}
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The implementation provided a perceptually similar alternative to the
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infeasible modulated delay line design from the previous assignment.
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Each delay can be set to up to a maximum delay time of 250 samples.
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This allows for manual shifting of phases to taste. Overall this
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results in a functional alternative at the cost of perceptual quality.
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Through the use of a spectrogram, it can be seen in figure
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\ref{fig:cho_spec} that the signal is clearly noisy and distorted with
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harmonics produced far above the nyquist rate. This is most likely due
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to the poor converter performance
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\begin{figure}[H]
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\caption{Chorus spectrogram displaying distortion}
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\makebox[\textwidth]{\includegraphics[width=\textwidth]{Chorus_spectrogram}}
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\label{fig:cho_spec}
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\end{figure}
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\subsection{Reverb}
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A crude slapback reverb was created using an FIR/IIR filter
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combination. The result was a short reverb tail with decaying
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repetitions of the dry sample. This would have been vastly improved
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with the addition of further parallel comb filters or all pass filters.
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A clear decaying echo can be see in figure \ref{fig:rev_wav}
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\begin{figure}[H]
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\caption{Reverb waveform}
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\makebox[\textwidth]{\includegraphics[width=\textwidth]{Click_reverb_waveform}}
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\label{fig:rev_wav}
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\end{figure}
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\section{Further Work}
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Building on skills learnt in this project, results could be improved
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significantly through the use of C code directly, allowing for greater
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control over the underlying logic than is possible through Flowcode. This
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would also offer greater scope for design as it would no longer be limited
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to the relatively limited Flowcode macros.\\
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The main improvement would be to use a more capable system. It is clear
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that the limitations of the system have impeded the quality of results to
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an unreasonable degree.
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\section{Conclusions}
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Overall this project has offered insight into the performance issues and
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limitations involved when programming for integrated systems of finite
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resources. It has also highlighted the limitations of real-time processing
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as opposed to offline processing.\\
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When planning a hardware system it is clear that the system specification
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and design of it's code must be as efficient as possible in order to
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produce the quality of results that are possible on unlimited resource
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systems such as a standard computer.
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\printbibliography
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\end{document}
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